Publications

Ph.D. Dissertation

  • Studies on Automatic Parallelization for Heterogeneous and Homogeneous Multicore Processors. Akihiro Hayashi. February  2012.pdficon_large SS_Logo_Desktop_Black

Refereed Conference and Journal Publications

  1. Performance Evaluation of OpenMP’s Target Construct on GPUs. Akihiro Hayashi, Jun Shirako, Ettore Tiotto, Robert Ho, Vivek Sarkar. International Journal of High Performance Computing and Networking (IJHPCN), (to Appear).
  2. Optimized Two-level Parallelization for GPU Accelerators using the Polyhedral Model. Jun Shirako, Akihiro Hayashi, Vivek Sarkar. 26th International Conference on Compiler Construction (CC2017), February 2017.
  3. Compiling and Optimizing Java 8 Programs for GPU execution. Kazuaki Ishizaki, Akihiro Hayashi, Gita Koblents, Vivek Sarkar. 24th International Conference on Parallel Architectures and Compilation Techniques (PACT2015), October 2015.  Logo_TM
  4. Machine-Learning-based Performance Heuristics for Runtime CPU/GPU Selection. Akihiro Hayashi, Kazuaki Ishizaki, Gita Koblents, Vivek Sarkar. 12th International Conference on the Principles and Practice of Programming in Java (PPPJ2015), September 2015. pdficon_large Logo_TM SS_Logo_Desktop_Black
  5. Automatic Parallelization of Designed Engine Control C Codes by MATLAB/Simulink. Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Mitsuhiro Tani, Hiroshi Mori, Keiji Kimura, Kasahara Hironori, IPSJ Journal, August, 2014. (in Japanese)
  6. Accelerating Habanero-Java Program with OpenCL Generation. Akihiro Hayashi, Max Grossman, Jisheng Zhao, Jun Shirako, Vivek Sarkar. 10th International Conference on the Principles and Practice of Programming in Java (PPPJ2013), September 2013. pdficon_large Logo_TM SS_Logo_Desktop_Black
  7. Automatic Parallelization, Performance Predictability and Power Control for Mobile-Applications. Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara. 16th IEEE Symposium on Low-Power and High-Speed Chips (CoolChips XVI), April 2013. Logo_TM
  8. Parallelization of Automotive Engine Control Software On Embedded Multi-core Processor Using OSCAR Compiler. Yohei Kanehagi, Dan Umeda, Akihiro Hayashi, Keiji Kimura and Hironori Kasahara, 16th IEEE Symposium on Low-Power and High-Speed Chips (CoolChips XVI), April 2013. Logo_TM
  9. Parallel processing of multimedia applications on TILEPro64 using OSCAR API for embedded multicore. Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano, Akihiro Hayashi, Keiji Kimura and Hironori Kasahara, IPSJ Symposium on Embedded System (ESS2012), October 2012. (in Japanese)
  10. Automatic Parallelization of Dose Calculation Engine for A Particle Therapy. Akihiro Hayashi, Takuji Matsumoto, Hiroki Mikami, Keiji Kimura, Keiji Yamamoto, Hironori Saki, Yasuyuki Takatani, Hironori Kasahara, IPSJ Symposium on High Performance Computing and Computer Science (HPCS2012), January 2012. (in Japanese)
  11. Parallelizing Compiler Framework and API for Heterogeneous Multicores. Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura and Hironori Kasahara, IPSJ Transactions on Advanced Computing Systems (ACS), Vol.5, No.1, pp.68-79, November. 2011. (in Japanese) 
  12. A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, and Hironori Kasahara, Transactions on High-Performance Embedded Architectures and Compilers IV (HiPEAC IV), Lecture Note in Computer Science, Springer, Vol. 6760, pp. 215-233, November 2011. Logo_TM
  13. A 45nm Heterogeneous Multi-core SoC Supporting an over 32-bits Physical Address Space for Digital Appliance. Takumi Nito, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Takada, Makoto Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara, Hideo Maejima,13th IEEE Symposium on Low-power and High-Speed Chips (COOL Chips XIII), April 2010. Logo_TM
  14. Parallelization of MP3 Encoder using Static Scheduling on a Heterogeneous Multicore. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara, Transactions of IPSJ on Computing Systems, Vol. 49 (ACS), 2008 (in Japanese)
  15. Software-Cooperative Power-Efficient Heterogeneous Multi-Core for Media Processing. Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka,Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, 13th Asia and South Pacific Design Automation Conference (ASP-DAC2008), January 2008. Logo_TM

Refereed Workshop Proceedings

  1. Exploring Compiler Optimization Opportunities for the OpenMP 4.x Accelerator Model on a POWER8+GPU Platform. Akihiro Hayashi, Jun Shirako, Ettore Tiotto, Robert Ho, Vivek Sarkar. Third Workshop on Accelerator Programming Using Directives (WACCPD), November 2016. (co-located with SC16) Logo_TM SS_Logo_Desktop_Black
  2. LLVM-based Communication Optimizations for PGAS Programs. Akihiro Hayashi, Jisheng Zhao, Michael Ferguson, Vivek Sarkar. 2nd Workshop on the LLVM Compiler Infrastructure in HPC (LLVM), November, 2015. (co-located with SC15)  Logo_TM SS_Logo_Desktop_Black
  3. LLVM Optimizations for PGAS Programs -Case Study: LLVM Wide Optimization in Chapel-. Akihiro Hayashi, Rishi Surendran, Jisheng Zhao, Michael Ferguson, Vivek Sarkar. 1st Chapel Implementers and Users Workshop (CHIUW2014), May 2014. (co-located with IPDPS) pdficon_large SS_Logo_Desktop_Black
  4. Speculative Execution of Parallel Programs with Precise Exception Semantics on GPUs. Akihiro Hayashi, Max Grossman, Jisheng Zhao, Jun Shirako, Vivek Sarkar. 26th International Workshop on Languages and Compilers for Parallel Computing (LCPC2013), September 2013. (co-located with CnC). pdficon_large Logo_TM SS_Logo_Desktop_Black
  5. Reconciling Application Power Control and Operating Systems for Optimal Power and Performance. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Mikami Hiroki, Keiji Kimura, Hironori Kasahara. 8th International Workshop on Reconfigurable Communication-centric Systemson-Chip (ReCoSoC2013), Germany, 2013. Logo_TM
  6. Automatic Parallelization of Hand Written Automotive Engine Control Codes Using OSCAR Compiler. Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Keiji Kimura and Hironori Kasahara. 17th Workshop on Compilers for Parallel Computing (CPC2013), July 2013.
  7. OSCAR API v2.1: Extensions for an Advanced Accelerator Control Scheme to a Low-Power Multicore API. Keiji Kimura, Cecilia Gonzales-Alvarez, Akihiro Hayashi, Hiroki Mikami, Mamoru Shimaoka, Jun Shirako, Hironori Kasahara, 17th Workshop on Compilers for Parallel Computing (CPC2013), July 2013.
  8. Automatic Design Exploration Framework for Multicores with Reconfigurable Accelerators. Cecilia Gonzalez-Alvarez, Haruku Ishikawa, Akihiro Hayashi, Daniel Jimenez-Gonzalez, Carlos Alvarez, Keiji Kimura and Hironori Kasahara. 7th HiPEAC Workshop on Reconfigurable Computing (WRC2013), January, 2013.
  9. OSCAR Parallelizing Compiler and API for Real-time Low Power Heterogeneous Multicores. Akihiro Hayashi, Mamoru Shimaoka, Hiroki Mikmi, Masayoshi Mase, Yasutaka Wada, Jun Shirako, Keiji Kimura, and Hironori Kasahara, 16th Workshop on Compilers for Parallel Computing (CPC2012), January 2012.
  10. Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-power Multicore. Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru Shimaoka, Keiji Kimura, Masato Edahiro, and Hironori Kasahara, 24th International Workshop on Languages and Compilers for Parallel Computing (LCPC2011), September 2011. Logo_TM
  11. Parallelizing Compiler Framework and API for Power Reduction and Software Productivity of Real-time Heterogeneous Multicores. Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura and Hironori Kasahara, 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC2010), October 2010. Logo_TM
  12. Performance of OSCAR Multigrain Parallelizing Compiler on Multicore Processors. Hiroki Mikami, Jun Shirako, Masayoshi Mase, Takamichi Miyamoto, Hirofumi Nakano, Fumiyo Takano, Akihiro Hayashi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, 14th Workshop on Compilers for Parallel Computing(CPC2009), January 2009.
  13. Parallelizing Compiler Cooperative Heterogeneous Multicore. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara, Workshop on Software and Hardware Challenges of Manycore Platforms (SHCMP2008), June 2008. (co-located ISCA2008)

Refereed Posters

  1. How Java runtime can execute practical Java programs on GPU. Kazuaki Ishizaki,Gita Koblents,Akihiro Hayashi,Vivek Sarkar,Hiroshi Inoue. Poster Session, IPSJ Symposium on High Performance Computing and Computer Science (HPCS2015), May 2015. (in Japanese)
  2. Parallel Processing of Multimedia Applications on TILEPro64. Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. 16th IEEE Symposium on Low Power and High-Speed Chips (COOL Chips XVI), April 2013.
  3. Opportunities and Challenges of Application-Power Control in the Age of Dark Silicon. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. 8th international conference on High-Performance and Embedded Architectures and Compilers (HiPEAC2013), January 2013.
  4. OSCAR Parallelizing Compiler Cooperative Heterogeneous Multi-core Architecture. Akihiro Hayashi, Yasutaka Wada, Hiroaki Shikano, Teruo Kamiayama, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, 18th International Conference on Parallel Architectures and Compilation Techniques (PACT2009), September 2009.

Invited Talks

  1. How to design human actions by digital technology? The National Convention of IPSJ, March 2013. (in Japanese)

Presentations

  1. Machine-learning-based Performance Heuristics for Runtime CPU/GPU Selection in Java. 10th Workshop on Challenges for Parallel Computing, November 2015. (co-located with IBM CASCON2015) SS_Logo_Desktop_Black
  2. LLVM-based Communication Optimizations for Chapel.  Chapel Lightning Talks Birds-of-a-Feather at International Conference for High Performance Computing, Networking, Storage and Analysis  (SC14), November 2014.

Non Refereed Technical Reports

  1. Performance Evaluation of Hierarchical Barrier Hardware with OSCAR API Analyzer. Akihiro Kawashima, Yohei Kanehagi, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ. V0l.2013-ARC-206-16 (SWoPP2013), July 2013. (in Japanese)
  2. An Investigation of Parallelization and Evaluation on Commercial Multi-core Smart Device. Hideo Yamamoto, Takashi Goto, Tomohiro Hirano, Kouhei Muto, Hiroki Mikami, Dominic Hillenbrand, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara.  Technical Report of IPSJ, Vol. 2013-OS-124, February 2013. (in Japanese)
  3. Parallelization of Automobile Engine Control Software on Multicore Processor. Yohei Kanehagi, Dan Umeda, Hiroki Mikami, Akihiro Hayashi, Mitsuo Sawada, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2013-ARC195-2, January 2013. (in Japanese)
  4. Automatic parallelization of the GMS Earthquake simulator with OSCAR Compiler. Mamoru Shimaoka, Hiroki Mikami, Akihiro Hayashi, Yasutaka Wada, Keiji Kimura, Hidekazu Morita, Kunio Uchiyama, Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC194HPC137-26 (HOKKE2012), December 2012.
  5. Automatic parallelization with OSCAR API Analyzer: a cross-platform performance evaluation. Cecilia Gonzalez-Alvarez, Yohei Kanehagi, Kosei Takemoto, Yohei Kishimoto, Kohei Muto, Hiroki Mikami, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC194HPC137-10 (HOKKE2012), December 2012.
  6. Opportunities and Challenges of Application-Power Control in the Age of Dark Silicon. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara, Technical Report of IPSJ, Vol.2012-ARC194HPC137-11(HOKKE2012), December 2012.
  7. Realization of 1 Watt Web Service with RP-X Low-power Multicore Processor. Yuuki Furuyama, Mamoru Shimaoka, Hiroki Mikami, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC-201-24 (SWoPP2012), August 2012. (in Japanese)
  8. Parallelization of Basic Engine Control Software Model  on Multicore Processor. Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Mituhiro Tani, Yuji Mori, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC-201-22 (SWoPP2012), August 2012. (in Japanese)
  9. Automatic Parallelization of Dose Calculation Engine for A Particle Therapy on SMP Servers. Akihiro Hayashi, Takuji Matsumoto, Hiroki Mikami, Keiji Kimura, Keiji Ya- mamoto, Hironori Saki, Yasuyuki Takatani, Hironori Kasahara. Technical Report of IPSJ, Vol.2011-ARC189HPC132-2 (HOKKE2011), November 2011. (in Japanese)
  10. Hiding I/O overheads with Parallelizing Compiler for Media Applications. Akihiro Hayashi, Takeshi Sekiguchi, Masayoshi Mase, Yasutaka Wada, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2011-ARC-195OS117-14, April 2011. (in Japanese)
  11. Evaluation of Parallelizable C Programs by the OSCAR API Standard Translator. Takuya Sato, Hiroki Mikami, Akihiro Hayashi, Masayoshi Mase, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2010-ARC-191-2, October 2010. (in Japanese)
  12. A Compiler Framework for Heterogeneous Multicores for Consumer Electronics. Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Keiji Kimura, Masayuki Ito, Jun Hasegawa, Makoto Sato, Toru Nojiri, Ku- nio Uchiyama, Hironori Kasahara. Technical Report of IPSJ, Vol.2010-ARC- 190-7 (SWoPP2010), August 2010. (in Japanese)
  13. Performance of Power Reduc- tion Scheme by a Compiler on Heterogeneous Multicore for Consumer Electronics RP-X. Yasutaka Wada, Akihiro Hayashi, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura, Masayuki Ito, Jun Hasegawa, Makoto Sato, Toru Nojiri, Kunio Uchiyama, Hironori Kasahara,  Technical Report of IPSJ, Vol.2010-ARC-190-8 (SWoPP2010), August 2010. (in Japanese)
  14. Performance Evaluation of Parallelizing Compiler Cooperated Heterogeneous Multicore Architecture Using Media Applications. Teruo Kamiyama, Yasutaka Wada, Akihiro Hayashi, Masayoshi Mase, Hirofumi Nakano, Takeshi Watanabe, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2009-ARC-173, Jan. 2009. (in Japanese)
  15. A Hierarchical Coarse Grain Task Static Scheduling Scheme on a Heterogeneous Multicore. Yasutaka Wada, Akihiro Hayashi, Taketo Iyoku, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara,  Technical Report of IPSJ, Vol.2007-ARC-174-17 (SWoPP2007), August 2007. (in Japanese)
  16. Compiler Control Power Saving for Heterogeneous Multicore Processor. Akihiro Hayashi, Taketo Iyoku, Ryo Nakagawa, Shigeru Matsumoto, Kaito Ya- mada, Naoto Oshiyama, Jun Shirako, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2007-ARC- 174-18 (SWoPP2007), August 2007. (in Japanese)